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[Other] float_add

Description: 该程序是用Verilog语言写的，可以完成（1，5，9）格式的浮点数相加。-The program is written in Verilog, you can complete the (1,5,9) add floating-point format.
Platform: | Size: 1788928 | Author: 陈晓 | Hits:

[VHDL-FPGA-Verilog] 6data-power2verilog

Description: verilog code (power two) for 6 data entry in 32bit floating point
Platform: | Size: 1024 | Author: hafiez | Hits:

[VHDL-FPGA-Verilog] floating_point_multiplier_verilog

Description: This code has written in verilog and it can multiply two floating point number with IEEE 754 standards and the out put of this code is in IEEE 754 standard.We have to put input in binary and the out put is also in binary.
Platform: | Size: 1024 | Author: sajad | Hits:

[VHDL-FPGA-Verilog] MULT

Description: the document used to describe the verilog codes design floating point multiplier in coms design
Platform: | Size: 2351104 | Author: rajapraba | Hits:

[VHDL-FPGA-Verilog] float

Description: 基于Verilog HDL的32位浮点运算加法器的源代码。-Based on the 32-bit floating point adder in Verilog HDL source code.
Platform: | Size: 1024 | Author: 朱文 | Hits:

[VHDL-FPGA-Verilog] fpu_double

Description: The Verilog version of the code is in folder “fpu_double”, and the VHDL version is in folder “double_fpu”. There is a readme file in each folder, and a testbench file to simulate each core. These cores are designed to meet the IEEE 754 standard for double precision floating point arithmetic.
Platform: | Size: 244736 | Author: 丁一 | Hits:
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